Achitecture Level Optimization for Asynchronous IPS1

نویسندگان

  • Wolfram Hardt
  • M. Visarius
  • B. Kleinjohann
چکیده

In1this paper we present a customized approach to performance and area optimization of asynchronous functional blocks. First an abstract model of the block architecture is introduced and an analytical method for throughput maximization is described. Secondly, area optimization can be performed with respect to data dependencies and merged data paths. These methods have been implemented and validated by several examples. A first chip implementing all relevant architecture blocks has been produced. The chip is named FLYSIG2 and operates completely delay-insensitive.

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تاریخ انتشار 2007